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<h4 class="subsection" id="Nios-II-Options-1"><span>3.19.34 Nios II Options<a class="copiable-link" href="#Nios-II-Options-1"> &para;</a></span></h4>
<a class="index-entry-id" id="index-Nios-II-options"></a>
<a class="index-entry-id" id="index-Altera-Nios-II-options"></a>

<p>These are the options defined for the Altera Nios II processor.
</p>
<dl class="table">
<dt><a class="index-entry-id" id="index-smaller-data-references-1"></a>
<a id="index-G-3"></a><span><code class="code">-G <var class="var">num</var></code><a class="copiable-link" href="#index-G-3"> &para;</a></span></dt>
<dd><p>Put global and static objects less than or equal to <var class="var">num</var> bytes
into the small data or BSS sections instead of the normal data or BSS
sections.  The default value of <var class="var">num</var> is 8.
</p>
</dd>
<dt><a class="index-entry-id" id="index-mno_002dgpopt-1"></a>
<a id="index-mgpopt-1"></a><span><code class="code">-mgpopt=<var class="var">option</var></code><a class="copiable-link" href="#index-mgpopt-1"> &para;</a></span></dt>
<dt><code class="code">-mgpopt</code></dt>
<dt><code class="code">-mno-gpopt</code></dt>
<dd><p>Generate (do not generate) GP-relative accesses.  The following 
<var class="var">option</var> names are recognized:
</p>
<dl class="table">
<dt>&lsquo;<samp class="samp">none</samp>&rsquo;</dt>
<dd><p>Do not generate GP-relative accesses.
</p>
</dd>
<dt>&lsquo;<samp class="samp">local</samp>&rsquo;</dt>
<dd><p>Generate GP-relative accesses for small data objects that are not 
external, weak, or uninitialized common symbols.  
Also use GP-relative addressing for objects that
have been explicitly placed in a small data section via a <code class="code">section</code>
attribute.
</p>
</dd>
<dt>&lsquo;<samp class="samp">global</samp>&rsquo;</dt>
<dd><p>As for &lsquo;<samp class="samp">local</samp>&rsquo;, but also generate GP-relative accesses for
small data objects that are external, weak, or common.  If you use this option,
you must ensure that all parts of your program (including libraries) are
compiled with the same <samp class="option">-G</samp> setting.
</p>
</dd>
<dt>&lsquo;<samp class="samp">data</samp>&rsquo;</dt>
<dd><p>Generate GP-relative accesses for all data objects in the program.  If you
use this option, the entire data and BSS segments
of your program must fit in 64K of memory and you must use an appropriate
linker script to allocate them within the addressable range of the
global pointer.
</p>
</dd>
<dt>&lsquo;<samp class="samp">all</samp>&rsquo;</dt>
<dd><p>Generate GP-relative addresses for function pointers as well as data
pointers.  If you use this option, the entire text, data, and BSS segments
of your program must fit in 64K of memory and you must use an appropriate
linker script to allocate them within the addressable range of the
global pointer.
</p>
</dd>
</dl>

<p><samp class="option">-mgpopt</samp> is equivalent to <samp class="option">-mgpopt=local</samp>, and
<samp class="option">-mno-gpopt</samp> is equivalent to <samp class="option">-mgpopt=none</samp>.
</p>
<p>The default is <samp class="option">-mgpopt</samp> except when <samp class="option">-fpic</samp> or
<samp class="option">-fPIC</samp> is specified to generate position-independent code.
Note that the Nios II ABI does not permit GP-relative accesses from
shared libraries.
</p>
<p>You may need to specify <samp class="option">-mno-gpopt</samp> explicitly when building
programs that include large amounts of small data, including large
GOT data sections.  In this case, the 16-bit offset for GP-relative
addressing may not be large enough to allow access to the entire 
small data section.
</p>
</dd>
<dt><a id="index-mgprel_002dsec"></a><span><code class="code">-mgprel-sec=<var class="var">regexp</var></code><a class="copiable-link" href="#index-mgprel_002dsec"> &para;</a></span></dt>
<dd><p>This option specifies additional section names that can be accessed via
GP-relative addressing.  It is most useful in conjunction with 
<code class="code">section</code> attributes on variable declarations 
(see <a class="pxref" href="Common-Variable-Attributes.html">Common Variable Attributes</a>) and a custom linker script.  
The <var class="var">regexp</var> is a POSIX Extended Regular Expression.
</p>
<p>This option does not affect the behavior of the <samp class="option">-G</samp> option, and 
the specified sections are in addition to the standard <code class="code">.sdata</code>
and <code class="code">.sbss</code> small-data sections that are recognized by <samp class="option">-mgpopt</samp>.
</p>
</dd>
<dt><a id="index-mr0rel_002dsec"></a><span><code class="code">-mr0rel-sec=<var class="var">regexp</var></code><a class="copiable-link" href="#index-mr0rel_002dsec"> &para;</a></span></dt>
<dd><p>This option specifies names of sections that can be accessed via a 
16-bit offset from <code class="code">r0</code>; that is, in the low 32K or high 32K 
of the 32-bit address space.  It is most useful in conjunction with 
<code class="code">section</code> attributes on variable declarations 
(see <a class="pxref" href="Common-Variable-Attributes.html">Common Variable Attributes</a>) and a custom linker script.  
The <var class="var">regexp</var> is a POSIX Extended Regular Expression.
</p>
<p>In contrast to the use of GP-relative addressing for small data, 
zero-based addressing is never generated by default and there are no 
conventional section names used in standard linker scripts for sections
in the low or high areas of memory.
</p>
</dd>
<dt><a class="index-entry-id" id="index-meb-1"></a>
<a id="index-mel-1"></a><span><code class="code">-mel</code><a class="copiable-link" href="#index-mel-1"> &para;</a></span></dt>
<dt><code class="code">-meb</code></dt>
<dd><p>Generate little-endian (default) or big-endian (experimental) code,
respectively.
</p>
</dd>
<dt><a id="index-march-11"></a><span><code class="code">-march=<var class="var">arch</var></code><a class="copiable-link" href="#index-march-11"> &para;</a></span></dt>
<dd><p>This specifies the name of the target Nios II architecture.  GCC uses this
name to determine what kind of instructions it can emit when generating
assembly code.  Permissible names are: &lsquo;<samp class="samp">r1</samp>&rsquo;, &lsquo;<samp class="samp">r2</samp>&rsquo;.
</p>
<p>The preprocessor macro <code class="code">__nios2_arch__</code> is available to programs,
with value 1 or 2, indicating the targeted ISA level.
</p>
</dd>
<dt><a class="index-entry-id" id="index-mbypass_002dcache"></a>
<a id="index-mno_002dbypass_002dcache"></a><span><code class="code">-mbypass-cache</code><a class="copiable-link" href="#index-mno_002dbypass_002dcache"> &para;</a></span></dt>
<dt><code class="code">-mno-bypass-cache</code></dt>
<dd><p>Force all load and store instructions to always bypass cache by 
using I/O variants of the instructions. The default is not to
bypass the cache.
</p>
</dd>
<dt><a class="index-entry-id" id="index-mno_002dcache_002dvolatile"></a>
<a id="index-mcache_002dvolatile"></a><span><code class="code">-mno-cache-volatile</code><a class="copiable-link" href="#index-mcache_002dvolatile"> &para;</a></span></dt>
<dt><code class="code">-mcache-volatile</code></dt>
<dd><p>Volatile memory access bypass the cache using the I/O variants of 
the load and store instructions. The default is not to bypass the cache.
</p>
</dd>
<dt><a class="index-entry-id" id="index-mfast_002dsw_002ddiv"></a>
<a id="index-mno_002dfast_002dsw_002ddiv"></a><span><code class="code">-mno-fast-sw-div</code><a class="copiable-link" href="#index-mno_002dfast_002dsw_002ddiv"> &para;</a></span></dt>
<dt><code class="code">-mfast-sw-div</code></dt>
<dd><p>Do not use table-based fast divide for small numbers. The default 
is to use the fast divide at <samp class="option">-O3</samp> and above.
</p>
</dd>
<dt><a class="index-entry-id" id="index-mhw_002dmul"></a>
<a class="index-entry-id" id="index-mno_002dhw_002dmulx"></a>
<a class="index-entry-id" id="index-mhw_002dmulx"></a>
<a class="index-entry-id" id="index-mno_002dhw_002ddiv"></a>
<a class="index-entry-id" id="index-mhw_002ddiv"></a>
<a id="index-mno_002dhw_002dmul"></a><span><code class="code">-mno-hw-mul</code><a class="copiable-link" href="#index-mno_002dhw_002dmul"> &para;</a></span></dt>
<dt><code class="code">-mhw-mul</code></dt>
<dt><code class="code">-mno-hw-mulx</code></dt>
<dt><code class="code">-mhw-mulx</code></dt>
<dt><code class="code">-mno-hw-div</code></dt>
<dt><code class="code">-mhw-div</code></dt>
<dd><p>Enable or disable emitting <code class="code">mul</code>, <code class="code">mulx</code> and <code class="code">div</code> family of 
instructions by the compiler. The default is to emit <code class="code">mul</code>
and not emit <code class="code">div</code> and <code class="code">mulx</code>.
</p>
</dd>
<dt><code class="code">-mbmx</code></dt>
<dt><code class="code">-mno-bmx</code></dt>
<dt><code class="code">-mcdx</code></dt>
<dt><code class="code">-mno-cdx</code></dt>
<dd><p>Enable or disable generation of Nios II R2 BMX (bit manipulation) and
CDX (code density) instructions.  Enabling these instructions also
requires <samp class="option">-march=r2</samp>.  Since these instructions are optional
extensions to the R2 architecture, the default is not to emit them.
</p>
</dd>
<dt><a class="index-entry-id" id="index-mno_002dcustom_002dinsn"></a>
<a id="index-mcustom_002dinsn"></a><span><code class="code">-mcustom-<var class="var">insn</var>=<var class="var">N</var></code><a class="copiable-link" href="#index-mcustom_002dinsn"> &para;</a></span></dt>
<dt><code class="code">-mno-custom-<var class="var">insn</var></code></dt>
<dd><p>Each <samp class="option">-mcustom-<var class="var">insn</var>=<var class="var">N</var></samp> option enables use of a
custom instruction with encoding <var class="var">N</var> when generating code that uses 
<var class="var">insn</var>.  For example, <samp class="option">-mcustom-fadds=253</samp> generates custom
instruction 253 for single-precision floating-point add operations instead
of the default behavior of using a library call.
</p>
<p>The following values of <var class="var">insn</var> are supported.  Except as otherwise
noted, floating-point operations are expected to be implemented with
normal IEEE 754 semantics and correspond directly to the C operators or the
equivalent GCC built-in functions (see <a class="pxref" href="Other-Builtins.html">Other Built-in Functions Provided by GCC</a>).
</p>
<p>Single-precision floating point:
</p><dl class="table">
<dt>&lsquo;<samp class="samp">fadds</samp>&rsquo;, &lsquo;<samp class="samp">fsubs</samp>&rsquo;, &lsquo;<samp class="samp">fdivs</samp>&rsquo;, &lsquo;<samp class="samp">fmuls</samp>&rsquo;</dt>
<dd><p>Binary arithmetic operations.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fnegs</samp>&rsquo;</dt>
<dd><p>Unary negation.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fabss</samp>&rsquo;</dt>
<dd><p>Unary absolute value.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fcmpeqs</samp>&rsquo;, &lsquo;<samp class="samp">fcmpges</samp>&rsquo;, &lsquo;<samp class="samp">fcmpgts</samp>&rsquo;, &lsquo;<samp class="samp">fcmples</samp>&rsquo;, &lsquo;<samp class="samp">fcmplts</samp>&rsquo;, &lsquo;<samp class="samp">fcmpnes</samp>&rsquo;</dt>
<dd><p>Comparison operations.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fmins</samp>&rsquo;, &lsquo;<samp class="samp">fmaxs</samp>&rsquo;</dt>
<dd><p>Floating-point minimum and maximum.  These instructions are only
generated if <samp class="option">-ffinite-math-only</samp> is specified.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fsqrts</samp>&rsquo;</dt>
<dd><p>Unary square root operation.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fcoss</samp>&rsquo;, &lsquo;<samp class="samp">fsins</samp>&rsquo;, &lsquo;<samp class="samp">ftans</samp>&rsquo;, &lsquo;<samp class="samp">fatans</samp>&rsquo;, &lsquo;<samp class="samp">fexps</samp>&rsquo;, &lsquo;<samp class="samp">flogs</samp>&rsquo;</dt>
<dd><p>Floating-point trigonometric and exponential functions.  These instructions
are only generated if <samp class="option">-funsafe-math-optimizations</samp> is also specified.
</p>
</dd>
</dl>

<p>Double-precision floating point:
</p><dl class="table">
<dt>&lsquo;<samp class="samp">faddd</samp>&rsquo;, &lsquo;<samp class="samp">fsubd</samp>&rsquo;, &lsquo;<samp class="samp">fdivd</samp>&rsquo;, &lsquo;<samp class="samp">fmuld</samp>&rsquo;</dt>
<dd><p>Binary arithmetic operations.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fnegd</samp>&rsquo;</dt>
<dd><p>Unary negation.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fabsd</samp>&rsquo;</dt>
<dd><p>Unary absolute value.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fcmpeqd</samp>&rsquo;, &lsquo;<samp class="samp">fcmpged</samp>&rsquo;, &lsquo;<samp class="samp">fcmpgtd</samp>&rsquo;, &lsquo;<samp class="samp">fcmpled</samp>&rsquo;, &lsquo;<samp class="samp">fcmpltd</samp>&rsquo;, &lsquo;<samp class="samp">fcmpned</samp>&rsquo;</dt>
<dd><p>Comparison operations.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fmind</samp>&rsquo;, &lsquo;<samp class="samp">fmaxd</samp>&rsquo;</dt>
<dd><p>Double-precision minimum and maximum.  These instructions are only
generated if <samp class="option">-ffinite-math-only</samp> is specified.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fsqrtd</samp>&rsquo;</dt>
<dd><p>Unary square root operation.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fcosd</samp>&rsquo;, &lsquo;<samp class="samp">fsind</samp>&rsquo;, &lsquo;<samp class="samp">ftand</samp>&rsquo;, &lsquo;<samp class="samp">fatand</samp>&rsquo;, &lsquo;<samp class="samp">fexpd</samp>&rsquo;, &lsquo;<samp class="samp">flogd</samp>&rsquo;</dt>
<dd><p>Double-precision trigonometric and exponential functions.  These instructions
are only generated if <samp class="option">-funsafe-math-optimizations</samp> is also specified.
</p>
</dd>
</dl>

<p>Conversions:
</p><dl class="table">
<dt>&lsquo;<samp class="samp">fextsd</samp>&rsquo;</dt>
<dd><p>Conversion from single precision to double precision.
</p>
</dd>
<dt>&lsquo;<samp class="samp">ftruncds</samp>&rsquo;</dt>
<dd><p>Conversion from double precision to single precision.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fixsi</samp>&rsquo;, &lsquo;<samp class="samp">fixsu</samp>&rsquo;, &lsquo;<samp class="samp">fixdi</samp>&rsquo;, &lsquo;<samp class="samp">fixdu</samp>&rsquo;</dt>
<dd><p>Conversion from floating point to signed or unsigned integer types, with
truncation towards zero.
</p>
</dd>
<dt>&lsquo;<samp class="samp">round</samp>&rsquo;</dt>
<dd><p>Conversion from single-precision floating point to signed integer,
rounding to the nearest integer and ties away from zero.
This corresponds to the <code class="code">__builtin_lroundf</code> function when
<samp class="option">-fno-math-errno</samp> is used.
</p>
</dd>
<dt>&lsquo;<samp class="samp">floatis</samp>&rsquo;, &lsquo;<samp class="samp">floatus</samp>&rsquo;, &lsquo;<samp class="samp">floatid</samp>&rsquo;, &lsquo;<samp class="samp">floatud</samp>&rsquo;</dt>
<dd><p>Conversion from signed or unsigned integer types to floating-point types.
</p>
</dd>
</dl>

<p>In addition, all of the following transfer instructions for internal
registers X and Y must be provided to use any of the double-precision
floating-point instructions.  Custom instructions taking two
double-precision source operands expect the first operand in the
64-bit register X.  The other operand (or only operand of a unary
operation) is given to the custom arithmetic instruction with the
least significant half in source register <var class="var">src1</var> and the most
significant half in <var class="var">src2</var>.  A custom instruction that returns a
double-precision result returns the most significant 32 bits in the
destination register and the other half in 32-bit register Y.  
GCC automatically generates the necessary code sequences to write
register X and/or read register Y when double-precision floating-point
instructions are used.
</p>
<dl class="table">
<dt>&lsquo;<samp class="samp">fwrx</samp>&rsquo;</dt>
<dd><p>Write <var class="var">src1</var> into the least significant half of X and <var class="var">src2</var> into
the most significant half of X.
</p>
</dd>
<dt>&lsquo;<samp class="samp">fwry</samp>&rsquo;</dt>
<dd><p>Write <var class="var">src1</var> into Y.
</p>
</dd>
<dt>&lsquo;<samp class="samp">frdxhi</samp>&rsquo;, &lsquo;<samp class="samp">frdxlo</samp>&rsquo;</dt>
<dd><p>Read the most or least (respectively) significant half of X and store it in
<var class="var">dest</var>.
</p>
</dd>
<dt>&lsquo;<samp class="samp">frdy</samp>&rsquo;</dt>
<dd><p>Read the value of Y and store it into <var class="var">dest</var>.
</p></dd>
</dl>

<p>Note that you can gain more local control over generation of Nios II custom
instructions by using the <code class="code">target(&quot;custom-<var class="var">insn</var>=<var class="var">N</var>&quot;)</code>
and <code class="code">target(&quot;no-custom-<var class="var">insn</var>&quot;)</code> function attributes
(see <a class="pxref" href="Function-Attributes.html">Declaring Attributes of Functions</a>)
or pragmas (see <a class="pxref" href="Function-Specific-Option-Pragmas.html">Function Specific Option Pragmas</a>).
</p>
</dd>
<dt><a id="index-mcustom_002dfpu_002dcfg"></a><span><code class="code">-mcustom-fpu-cfg=<var class="var">name</var></code><a class="copiable-link" href="#index-mcustom_002dfpu_002dcfg"> &para;</a></span></dt>
<dd>
<p>This option enables a predefined, named set of custom instruction encodings
(see <samp class="option">-mcustom-<var class="var">insn</var></samp> above).  
Currently, the following sets are defined:
</p>
<p><samp class="option">-mcustom-fpu-cfg=60-1</samp> is equivalent to:
</p><div class="example smallexample">
<pre class="example-preformatted">-mcustom-fmuls=252
-mcustom-fadds=253
-mcustom-fsubs=254
-fsingle-precision-constant
</pre></div>

<p><samp class="option">-mcustom-fpu-cfg=60-2</samp> is equivalent to:
</p><div class="example smallexample">
<pre class="example-preformatted">-mcustom-fmuls=252
-mcustom-fadds=253
-mcustom-fsubs=254
-mcustom-fdivs=255
-fsingle-precision-constant
</pre></div>

<p><samp class="option">-mcustom-fpu-cfg=72-3</samp> is equivalent to:
</p><div class="example smallexample">
<pre class="example-preformatted">-mcustom-floatus=243
-mcustom-fixsi=244
-mcustom-floatis=245
-mcustom-fcmpgts=246
-mcustom-fcmples=249
-mcustom-fcmpeqs=250
-mcustom-fcmpnes=251
-mcustom-fmuls=252
-mcustom-fadds=253
-mcustom-fsubs=254
-mcustom-fdivs=255
-fsingle-precision-constant
</pre></div>

<p><samp class="option">-mcustom-fpu-cfg=fph2</samp> is equivalent to:
</p><div class="example smallexample">
<pre class="example-preformatted">-mcustom-fabss=224
-mcustom-fnegs=225
-mcustom-fcmpnes=226
-mcustom-fcmpeqs=227
-mcustom-fcmpges=228
-mcustom-fcmpgts=229
-mcustom-fcmples=230
-mcustom-fcmplts=231
-mcustom-fmaxs=232
-mcustom-fmins=233
-mcustom-round=248
-mcustom-fixsi=249
-mcustom-floatis=250
-mcustom-fsqrts=251
-mcustom-fmuls=252
-mcustom-fadds=253
-mcustom-fsubs=254
-mcustom-fdivs=255
</pre></div>

<p>Custom instruction assignments given by individual
<samp class="option">-mcustom-<var class="var">insn</var>=</samp> options override those given by
<samp class="option">-mcustom-fpu-cfg=</samp>, regardless of the
order of the options on the command line.
</p>
<p>Note that you can gain more local control over selection of a FPU
configuration by using the <code class="code">target(&quot;custom-fpu-cfg=<var class="var">name</var>&quot;)</code>
function attribute (see <a class="pxref" href="Function-Attributes.html">Declaring Attributes of Functions</a>)
or pragma (see <a class="pxref" href="Function-Specific-Option-Pragmas.html">Function Specific Option Pragmas</a>).
</p>
<p>The name <var class="var">fph2</var> is an abbreviation for <em class="emph">Nios II Floating Point
Hardware 2 Component</em>.  Please note that the custom instructions enabled by
<samp class="option">-mcustom-fmins=233</samp> and <samp class="option">-mcustom-fmaxs=234</samp> are only generated
if <samp class="option">-ffinite-math-only</samp> is specified.  The custom instruction enabled by
<samp class="option">-mcustom-round=248</samp> is only generated if <samp class="option">-fno-math-errno</samp> is
specified.  In contrast to the other configurations,
<samp class="option">-fsingle-precision-constant</samp> is not set.
</p>
</dd>
</dl>

<p>These additional &lsquo;<samp class="samp">-m</samp>&rsquo; options are available for the Altera Nios II
ELF (bare-metal) target:
</p>
<dl class="table">
<dt><a id="index-mhal"></a><span><code class="code">-mhal</code><a class="copiable-link" href="#index-mhal"> &para;</a></span></dt>
<dd><p>Link with HAL BSP.  This suppresses linking with the GCC-provided C runtime
startup and termination code, and is typically used in conjunction with
<samp class="option">-msys-crt0=</samp> to specify the location of the alternate startup code
provided by the HAL BSP.
</p>
</dd>
<dt><a id="index-msmallc"></a><span><code class="code">-msmallc</code><a class="copiable-link" href="#index-msmallc"> &para;</a></span></dt>
<dd><p>Link with a limited version of the C library, <samp class="option">-lsmallc</samp>, rather than
Newlib.
</p>
</dd>
<dt><a id="index-msys_002dcrt0"></a><span><code class="code">-msys-crt0=<var class="var">startfile</var></code><a class="copiable-link" href="#index-msys_002dcrt0"> &para;</a></span></dt>
<dd><p><var class="var">startfile</var> is the file name of the startfile (crt0) to use 
when linking.  This option is only useful in conjunction with <samp class="option">-mhal</samp>.
</p>
</dd>
<dt><a id="index-msys_002dlib"></a><span><code class="code">-msys-lib=<var class="var">systemlib</var></code><a class="copiable-link" href="#index-msys_002dlib"> &para;</a></span></dt>
<dd><p><var class="var">systemlib</var> is the library name of the library that provides
low-level system calls required by the C library,
e.g. <code class="code">read</code> and <code class="code">write</code>.
This option is typically used to link with a library provided by a HAL BSP.
</p>
</dd>
</dl>

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